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www.rohm.com 2009.12 - rev.0.34 ? 2009 rohm co., ltd. all rights reserved. 1/12 automotive body power management lsi series led driver ic bd8115f-m description the bd8115f is a serial parallel control led driver with 35v input voltage rating. responding to the 3-line serial data, it turns the 8ch open drain output on/off. due to its compact size, it is optimal for small spaces. features 1) open drain output 2) 3-line serial control + enable signal 3) internal temperature protection circuit (tsd) 4) cascade connection compatible 5) sop16 6) internal 8ch power transistor z applications these ics can be used with car and consumer electronic. absolute maximum ratings (ta=25 ) item symbol value unit power supply voltage vcc 7 v output voltage pin no : 3 6, 11 14 vdmax 35 v input voltage pin no : 2, 7, 8, 10, 15 vin -0.3 vcc v power dissipation pd 560* mw operating temperature range topr -40 +105 storage temperature range tstg -55 +150 drive current (dc) iomaxd 50 ma drive current pulse iomaxp 150** ma junction temperature tjmax 150 * pd decreased at 4.48mw/ for temperatures above ta=25 ,mounted on 70701.6mm glass-epoxy pcb. ** do not however exceed pd. time to impress Q 200msec rev. 0.4 rev. 0.34
technical note 2/12 bd8115f-m www.rohm.com 2009.12 - rev.0.34 ? 2009 rohm co., ltd. all rights reserved. operational conditions (ta=-40~105 ) standard value item symbol min typ max unit power supply voltage vcc 4.5 5 5.5 v drive current io - 20 40 ma * this product is not designed for protection against radioactive rays. electrical characteristics (unless specified, ta=-40~105 vcc=4.5 5.5v) standard value item symbol min typ max unit conditions output d0 d7 pin no : 3 6, 11 14 on resistor ron - 6 12 ? i d =20ma output leakage current idl - 0 5 ua v d =34v logic input pin no : 2, 7, 8, 10, 15 upper limit threshold voltage vth vcc 0.8 - - v bottom limit threshold voltage vtl - - vcc 0.2 v hysteresis width vhys 0.15 0.3 0.45 v vcc=5v serial clock frequency fclk - - 1.25 mhz input current iin 20 50 100 ua vin=5v input leakage current iinl - 0 5 ua vin=0v whole circuit current icc - 0.3 5 ma serial data input, vcc=5v,clk=500khz, serout=open static current istn - 0 50 ua rst_b=open, serout=open ser out (pin no. : 9) output voltage high voh 4.6 4.8 - v vcc=5v, iso=-4ma output voltage low vol - 0.2 0.4 v vcc=5v, iso=4ma * this product is not designed for protection against radioactive rays.
technical note 3/12 bd8115f-m www.rohm.com 2009.12 - rev.0.34 ? 2009 rohm co., ltd. all rights reserved. electrical characteristic diagrams (unless otherwise specified ta=25 ) 4.0 4.5 5.0 5.5 6.0 -40 -15 10 35 60 85 ambient temperature ta[] o utput voltage vo h[v] 4.5v 5v 5.5v 0 1 2 3 4 5 6 7 8 9 -40 -15 10 35 60 85 ambient temperature ta[] output on re sistance ron[] 4.5v 5.5v 5v 4.0 4.5 5.0 5.5 6.0 4.5 4.7 4.9 5.1 5.3 5.5 supply voltage vcc[v] output voltage voh[v] -40 105 25 0.00 0.05 0.10 0.15 0.20 0.25 0.30 -40 -15 10 35 60 85 ambient temperature ta[] output voltage vol[v] 5.5v 4.5v 5v 0.00 0.05 0.10 0.15 0.20 0.25 0.30 4.5 4.7 4.9 5.1 5.3 5.5 supply vo ltage vcc[v] output voltage vol[v] -40 25 105 210 230 250 270 290 310 -40 -15 10 35 60 85 ambient temperature ta[] supply curren ticc[a] 5.5v 5.0v 4.5v 0 50 100 150 200 250 300 350 400 450 012345 supply voltagevcc[v] supply current icc[a] 105 25 -40 0 1 2 3 4 5 6 7 8 9 4.54.7 4.95.1 5.35.5 supply voltagevcc[v] output on resistanceron[] 105 25 -40 fig.6 serout high side voltage vcc characteristic @ iso=-5ma fig.1 circuit current vcc characteristic fig.4 output on resistance temperature characteristic @ idd=20ma fig.5 output on resistance idd characteristic fig.7 serout high side voltage temperature characteristic @ iso=-5ma fig.2 circuit current temperature characteristic fig.8 serout low side voltage vcc characteristic @ iso=5ma fig.9 serout low side voltage temperature characteristic @ iso=4ma fig.3 output on resistance vcc characteristic @ idd=20ma 0 50 100 150 200 250 300 10 20 30 40 50 input current i d [ma] output voltage [mv] 5.5v 4.5v 5v
technical note 4/12 bd8115f-m www.rohm.com 2009.12 - rev.0.34 ? 2009 rohm co., ltd. all rights reserved. block diagram fig.10 pin setup diagram terminal number ? terminal name bd8115fv sop16 fig.11 pin number terminal name function 1 vcc power supply voltage input terminal 2 serin serial data input terminal 3 d0 drain output terminal 0 4 d1 drain output terminal 1 5 d2 drain output terminal 2 6 d3 drain output terminal 3 7 rst_b reset return input terminal (l:ff data 0) 8 sdwn shut down input terminal (h: output off) 9 serout serial data output terminal 10 latch latch signal input terminal (h: data latch) 11 d4 drain output terminal 4 12 d5 drain output terminal 5 13 d6 drain output terminal 6 14 d7 drain output terminal 7 15 clk clock input terminal 16 gnd gnd terminal 1 2 3 4 5 6 7 8 16 15 14 13 12 11 vcc serin d0 d1 d2 d3 rst_b sdwn 9 10 serout latch d4 d5 d6 d7 clk gnd dq ck dq ck dq ck dq ck dq ck dq ck dq ck dq ck dq ck dq ck dq ck dq ck dq ck dq ck dq ck dq ck dq ck 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 tsd vcc serin d0 d1 d2 d3 rst_b sdwn gnd clk d7 d6 d5 d4 latch serout clr clr clr clr clr clr clr clr clr clr clr clr clr clr clr clr clr
technical note 5/12 bd8115f-m www.rohm.com 2009.12 - rev.0.34 ? 2009 rohm co., ltd. all rights reserved. block operation 1 serial i/f the i/f is a 3-line serial (latch, clk, serin) style. 8-bit output on/off can be set-up. this is co mposed of shift register. + 8-bit register. 2 driver it is a 8-bit open drain output. 3 tsd (thermal shut down) to prevent heat damage and overheating, when the chip temper ature goes over approximately 175 , the output turns off. when the temperature goes back down, normal operat ion resumes. however, the intended use of the temperature protection circuit is to protect the ic, so pl ease construct thermal design wi th the junction temperature tjmax under 150 . application circuit if= fig.12 vbat - vf rres + ron vcc 10uf 10uf vbat vcc micro - computer rres vcc sdwn latch rst_b clk serin serout gnd d0 d1 d2 d3 d4 d5 d6 d7 d0 d1 d2 d3 d4 d5 d6 d7 vcc sdwn latch rst_b clk serin serout gnd if vf 10uf
technical note 6/12 bd8115f-m www.rohm.com 2009.12 - rev.0.34 ? 2009 rohm co., ltd. all rights reserved. serial communication the serial i/f is composed of a shift register which change s the clk and serin serial signals to parallel signals, and a register to remember those signals with a latch signal. the registers are reset by applying a voltage under vcc 0.2 to the rst_b terminal or opening it, and d7~d0 become open. to prevent erroneous led light ing, please apply voltage under vcc 0.2 to rst_b or make it open during start-up. fig.13 1 serial communication timing the 8-bit serial data input from serin is taken into the shift register by the rise edge of the clk signal, and is recorded in the register by the rise edge of t he latch signal. the recorded data is valid until the next rise edge of the latch signal. 2 serial communication data the serial data input configuration of serin terminal is shown below: first last d7 d6 d5 d4 d3 d2 d1 d0 data data terminal name output status d7 d6 d5 d4 d3 d2 d1 d0 on 1 * * * * * * * d7 off 0 * * * * * * * on * 1 * * * * * * d6 off * 0 * * * * * * on * * 1 * * * * * d5 off * * 0 * * * * * on * * * 1 * * * * d4 off * * * 0 * * * * on * * * * 1 * * * d3 off * * * * 0 * * * on * * * * * 1 * * d2 off * * * * * 0 * * on * * * * * * 1 * d1 off * * * * * * 0 * on * * * * * * * 1 d0 off * * * * * * * 0 * represents ?don?t care?. shift register register clk serin latch driver 8bit 8bit
technical note 7/12 bd8115f-m www.rohm.com 2009.12 - rev.0.34 ? 2009 rohm co., ltd. all rights reserved. 3 enable signal by applying voltage at least vcc 0.8 or more to the sdwn terminal, d0~d7 become open forcibly. at this time, the temperature protection circuit (tsd) stops. d7 d0 become pwm operation by inputting pwm to sdwn. 4 serout a cascade connection can be made (connecting at least 2 or more ic?s in serial). serial signal input from serin is transferred into receiver ic by the fall edge of the clk signal. since this functionality gives enough margins for the setup time prior to the rise edge of the clk signal on the receiver ic (using the exact same clk signal of sender ic), the application reliability can be improved as cascade connection functionality. fig.14 cascade connection by using (at least) 2 ics, each ic?s d7~d0, at (at least) 16ch, can be controlled by the 16-bit serin signal. the serial data input to the sender ic can be transferred to the rece iver ic by inputting 8clk to the clk terminal. send side ic receive side ic fig.15 latch clk serin d7 d6 d5 d4 d3 d2 d1 d0 12345678 serout d7 latch clk serin d15 d14 d13 d12 123456789101112 13 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 14 15 16 d0
technical note 8/12 bd8115f-m www.rohm.com 2009.12 - rev.0.34 ? 2009 rohm co., ltd. all rights reserved. input signal?s timing chart fig.16 input signal?s timing rule ta = - 4 0 105 vcc=4.5 5.5v parameter symbol min unit clk period tck 800 ns clk high pulse width tckh 380 ns clk low pulse width tckl 380 ns serin high and low pulse width tsew 780 ns serin setup time prior to clk rise tsest 150 ns serin hold time after clk rise tsehd 150 ns latch high pulse time tlah 380 ns last clk rise to latch rise tladz 200 ns clk serin latch t ckl t sest t ckh t sehd t ladz t lah t ck 50% t sew 50% 50%
technical note 9/12 bd8115f-m www.rohm.com 2009.12 - rev.0.34 ? 2009 rohm co., ltd. all rights reserved. output signal?s delay chart fig.17 output signal?s delay time ta = -4 0 105 vcc=4.5 5.5v parameter symbol max unit sdwn switching time(l h) tdsnh 300 ns sdwn switching time(h l) tdsnl 300 ns latch switching delay time tdlah 300 ns serout propagation delay time(l h) tdsoh 350 ns serout propagation delay time (h l) tdsol 350 ns t dsnl 50% 50% 50% 50% 50% 50% t dlah sdwn output (d7 d0) latch output (d7 d0) clk t dsnh t dsoh t dsol serout
technical note 10/12 bd8115f-m www.rohm.com 2009.12 - rev.0.34 ? 2009 rohm co., ltd. all rights reserved. 100k (typ) vcc input/output equivalent circuit pin name 10pin latch 7pin rst_b 8pin sdwn 2pin serin 15pin clk 14pin d7 13pin d6 12pin d5 11pin d4 6pin d3 5pin d2 4pin d1 3pin d0 9pin serout fig.18 vcc vcc
technical note 11/12 bd8115f-m www.rohm.com 2009.12 - rev.0.34 ? 2009 rohm co., ltd. all rights reserved. operation notes (1) absolute maximum ratings use of the ic in excess of absolute maximum ratings such as the applied voltage or operating temperature range may result in ic damage. assumptions should not be made regarding the st ate of the ic (short mode or open mode) when such damage is suffered. a physical safety measure such as a fuse should be implem ented when use of the ic in a special mode where the absolute maximum ratings may be exceeded is anticipated. (2) reverse connection of a power supply connector if the connector of power is wrong connected, it may result in ic breakage. in order to prevent the breakage from the wrong connection, the diode should be connected between external power and the power terminal of ic as protection solution. (3) gnd potential ensure a minimum gnd pin potential in all operating conditions. (4) setting of heat use a setting of heat that allows for a sufficient margin in li ght of the power dissipation (pd) in actual operating conditions . (5) pin short and mistake fitting use caution when orienting and positioning the ic for mounting on printed circuit boards. improper mounting may result in damage to the ic. use of the ic in exce ss of absolute maximum ratings such as t he applied voltage or operating temperature range may result in ic damage. (6) actions in strong magnetic field use caution when using the ic in the presen ce of a strong electromagnetic field as do ing so may cause the ic to malfunction. (7) thermal shutdown circuit(tsd) this ic built-in a thermal shutdown circuit (tsd circuit). if chip temperature becomes 175(t yp.), make the output an open state. eventually, warmly clearing the circuit is decided by th e condition of whether the heat ex cesses over the assigned limit , resulting the cutoff of the circuit of ic, and not by the purpose of preventing an d ensuring the ic. therefore, the warm switch-off should not be applied in the pr emise of continuous employing and operati on after the circuit is switched on. (8) testing on application boards when testing the ic on an application board, connecting a capacito r to a pin with low impedance subjects the ic to stress. always discharge capacitors after each process or step. ground the ic during assembly steps as an antistatic measure, and use similar caution when transporting or stor ing the ic. always turn the ic's power supply off before connecting it to or removing it from a jig or fixture during the inspection process (9) ic terminal input this monolithic ic contains p+ isolation an d p substrate layers between adjacent elem ents in order to keep them isolated. p/n j unctions are formed at the intersection of these p la yers with the n layers of other elements to create a variety of parasitic elements. for example, when a resistor and transistor ar e connected to pins. (see the chart below.) { the p/n junction functions as a parasitic diode when gnd > (pin a) for the resistor or gnd > (p in b) for the transistor (npn). { similarly, when gnd > (pin b) for the transistor (npn), the pa rasitic diode described above combines with the n layer of other adjacent elements to operate as a parasitic npn transistor. the formation of parasitic elements as a result of the relationsh ips of the potentials of different pins is an inevitable resul t of the ic's architecture. the operation of parasitic elements can cause interf erence with circuit operation as well as ic malfunction and d amage. for these reasons, it is necessary to use caution so that the ic is not used in a wa y that will trigger the operation of parasi tic elements, such as by the application of voltages lowe r than the gnd (pcb) voltage to input pins. (10) ground wiring patterns when using both small signal and large current gnd patterns, it is recommended to isolate the two ground patterns, placing a single ground point at the application's refe rence point so that the pattern wiring resistance and voltage variations caused by large currents do not cause variations in t he small signal ground voltage. be careful not to change the gnd wiring patterns of any external components. (pin a) gnd n p n n p+ p+ resistor parasitic elements p parasitic elements ( pin b ) gnd c b e parasitic elements gnd ( pin a ) gnd n p n n p+ p+ parasitic elements p substrate ( pin b ) c b e transistor (npn) n gnd
technical note 12/12 bd8115f-m www.rohm.com 2009.12 - rev.0.34 ? 2009 rohm co., ltd. all rights reserved. ordering part number b d 8 1 1 5 f - m t e 2 part no. part no. package f: sop8 fp: hsop25 hfp:hrp7 packaging and forming specification e2: embossed tape and reel (sop8/hsop25) tr: embossed tape and reel (hrp7) none:tray,tube (unit : mm) sop16 8 0.1 16 1.27 0.11 1 9 0.3min 10 0.2 0.15 0.1 0.4 0.1 1.5 0.1 6.2 0.3 4.4 0.2 (max 10.35 include burr) ? order quantity needs to be multiple of the minimum quantity. embossed carrier tape tape quantity direction of feed the direction is the 1pin of product is at the upper left when you hold reel on the left hand and you pull out the tape on the right hand 2500pcs e2 () direction of feed reel 1pin

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